Assembler Code | Explanation |
---|---|
LDIL$2000,8 | R8:=$2000 |
LDO32(8),8 | R8:=R8 + 32 |
LDW-12(0,5),21 | R21:=memory(R5-12) |
STH8,0, (0,21) | memory(R21):=R8 |
LDH-8(0,5),22 | R22:=memory(R5-8) |
EXTRS22,31,16,22 | R22:=sign-extended(R22) |
LDO-1(22),22 | R22:=R22 - 1 |
Expect to find the instruction source on the left and the destination on the right:
LDW | d(s,b),t |
STH | r,d(s,b) |
LD | d(b),t |
LDIL | i,t |
EXTRS | r,p,len,t |
where
d | = | displacement |
t | = | target register |
i | = | immediate value |
s | = | space id |
r | = | source register |
p | = | bit position |
b | = | base register |
(s,b) | = | memory address |
len | = | number of bits |
In Load and Store instructions you see (0,xx) for the memory address, where 0 is the Space Id and xx is the Base Register. Space Id 0 is a special case, see Space Registers. The best instruction summary is the Precision Architecture and Instruction Reference Card (09740-90014).
Here are some tips to help you guess the function of an instruction from the mnemonic:
Arithmetic: | ADD@and SUB@. |
Branches: | B@ as in BL Branch and Link, BV Branch Vectored. |
Compare and Branch: | C@ as in COMIBF, COMpare Immediate and Branch If False. |
Extract: | EXTRS for signed and EXTRU for unsigned. |
Load: | L@ as in LDH load halfword, LDO load offset. |
Shift: | SH@ as in SH2ADD Shift 2 and Add. |
Store: | ST@ as in STB Store Byte, STW Store Word. |
A series of ADD@ and SH# ADD instructions, is usually a multiply operation without a multiply instruction. Because of delayed branches, the instruction after a branch is executed before the branch takes effect.